1. Field of the Invention
The present invention relates to a multilayered ceramic electronic component having high capacitance and excellent reliability and a fabricating method thereof, and more particularly, to a multilayered ceramic electronic component in which an L-direction margin of a cut chip is visible to the naked eye to thereby allow a defective chip to be easily detected.
2. Description of the Related Art
In accordance with the recent trend for the miniaturization of electronic products, demand for multilayered ceramic electronic components having a small size and high capacitance has increased.
Therefore, a dielectric layer and an internal electrode have been thinned and stacked in increased numbers through various methods. Recently, as a thickness of the dielectric layer has been reduced, multilayered ceramic electronic components having an increased number of stacked layers have been fabricated.
In a structure of a multilayered ceramic capacitor (MLCC), a margin in an L-direction or a W direction serves to protect a multilayered part of the internal electrodes charging and discharging electric charges from electrical stress, moisture, a plating solution, or the like. Therefore, a relatively minimal margin needs to be secured to secure durability, and in the case in which the margin in the L-direction or the W-direction is insufficient, a defect may be caused.
In fabricating the MLCC according to the related art, since a green chip is cut and the margin thereof is confirmed in a W direction, a margin test is performed before cutting the cut chip to detect a defective chip, such that a minimal W margin may be secured, but in the case of the margin in the L-direction, since the margin thereof is present in an inner portion of the cut chip, the margin may not be confirmed.
Therefore, in fact, in an electrical load test under high-temperature or high-moisture conditions, the margin in the L-direction (a distance between internal electrodes connected to a first external electrode and a second external electrode having polarity opposite to that of the first external electrode) is extremely small as several um at the time of deterioration in insulation resistance (IR) or within a defective chip, thus resulting in a deterioration the IR. In order to reduce these defects, a relatively minimal margin in the L-direction may be secured.